Regviz

NXP Semiconductors /LPC15xx /SYSCON /STARTERP0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as STARTERP0

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/NXP Semiconductors/LPC15xx/SYSCON/STARTERP0#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)WWDT 0 (DISABLED)BOD 0 (RESERVED)RESERVED 0 (DISABLED)GINT0 0 (DISABLED)GINT1 0 (DISABLED)PINT0 0 (DISABLED)PINT1 0 (DISABLED)PINT2 0 (DISABLED)PINT3 0 (DISABLED)PINT4 0 (DISABLED)PINT5 0 (DISABLED)PINT6 0 (DISABLED)PINT7 0 (RESERVED)RESERVED0 (DISABLED)USART0 0 (DISABLED)USART1 0 (DISABLED)USART2 0 (DISABLED)I2C 0 (DISABLED)SPI0 0 (DISABLED)SPI1 0 (RESERVED)RESERVED 0 (DISABLED)USB_WAKEUP 0 (RESERVED)RESERVED

USB_WAKEUP=DISABLED, USART1=DISABLED, PINT7=DISABLED, GINT1=DISABLED, PINT3=DISABLED, PINT5=DISABLED, USART2=DISABLED, SPI1=DISABLED, PINT4=DISABLED, GINT0=DISABLED, SPI0=DISABLED, PINT0=DISABLED, I2C=DISABLED, USART0=DISABLED, PINT6=DISABLED, PINT2=DISABLED, PINT1=DISABLED, BOD=DISABLED, WWDT=DISABLED

Description

Start logic 0 wake-up enable register

Fields

WWDT

WWDT interrupt wake-up.

0 (DISABLED): Disabled

1 (ENABLED): Enabled
BOD

BOD interrupt wake-up.

0 (DISABLED): Disabled

1 (ENABLED): Enabled
RESERVED

Reserved.
GINT0

Group interrupt 0 wake-up.

0 (DISABLED): Disabled

1 (ENABLED): Enabled
GINT1

Group interrupt 1 wake-up.

0 (DISABLED): Disabled

1 (ENABLED): Enabled
PINT0

GPIO pin interrupt 0 wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
PINT1

GPIO pin interrupt 1 wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
PINT2

GPIO pin interrupt 2 wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
PINT3

GPIO pin interrupt 3 wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
PINT4

GPIO pin interrupt 4 wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
PINT5

GPIO pin interrupt 5 wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
PINT6

GPIO pin interrupt 6 wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
PINT7

GPIO pin interrupt 7 wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
RESERVED

Reserved.
USART0

USART0 interrupt wake-up. Configure USART in synchronous slave mode or in 32 kHz mode…

0 (DISABLED): Disabled

1 (ENABLED): Enabled
USART1

USART1 interrupt wake-up. Configure USART in synchronous slave mode or in 32 kHz mode…

0 (DISABLED): Disabled

1 (ENABLED): Enabled
USART2

USART2 interrupt wake-up. Configure USART in synchronous slave mode or in 32 kHz mode…

0 (DISABLED): Disabled

1 (ENABLED): Enabled
I2C

I2C interrupt wake-up.

0 (DISABLED): Disabled

1 (ENABLED): Enabled
SPI0

SPI0 interrupt wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
SPI1

SPI1 interrupt wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
RESERVED

Reserved
USB_WAKEUP

USB need_clock signal wake-up

0 (DISABLED): Disabled

1 (ENABLED): Enabled
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data